OpenAI and Broadcom unveil LLM-optimized inference chip
Key Points
- 1OpenAI and Broadcom have unveiled "Jalapeño," a custom-designed AI accelerator built specifically to optimize the performance, efficiency, and latency of large language model (LLM) inference.
- 2The chip was developed in a record-breaking nine-month timeline, leveraging OpenAI’s own models to accelerate the design process and achieve superior performance-per-watt metrics.
- 3This initiative marks the beginning of a multi-generation infrastructure roadmap intended to support gigawatt-scale data center deployments and improve the accessibility of advanced AI products.
OpenAI and Broadcom have unveiled "Jalapeño," a first-generation, custom-designed AI accelerator specifically architected for Large Language Model (LLM) inference. Developed in a record nine-month design-to-tape-out cycle—aided by OpenAI’s own AI models—this chip serves as the foundational element of a multi-generation compute platform aimed at optimizing the full-stack infrastructure for frontier AI.
Core Architecture and Methodology
Jalapeño represents a shift from general-purpose AI accelerators to a specialized "blank-slate" architecture tailored for LLM inference. The design philosophy centers on minimizing data movement and optimizing the balance between compute, memory, and networking resources.Technically, the methodology focuses on:
- Kernel and Serving Optimization: The hardware is co-designed with the software stack (kernels, scheduling, and serving systems) to ensure that realized utilization approaches the theoretical peak performance ().
- Memory/Compute Balance: By reducing the cost of data movement—a traditional bottleneck in Transformer-based inference—the architecture minimizes latency and maximizes throughput, particularly for large-scale interactive applications.
- Networking Integration: The platform incorporates Broadcom’s Tomahawk networking silicon to facilitate high-bandwidth, low-latency communication across gigawatt-scale data centers.
- Full-Stack Co-Design: The integration involves a tripartite partnership: OpenAI provides the model-driven architectural insights, Broadcom handles silicon implementation and high-performance networking, and Celestica manages rack and system-level integration.
Performance and Strategic Implications
Early testing on engineering samples, including workloads like "GPT-5.3-Codex-Spark," confirms that the chip operates at production target frequencies. While comprehensive benchmarks are forthcoming, early metrics indicate a "performance per watt" (measured as ) that significantly exceeds current state-of-the-art accelerators.Strategic Goals
- Full-Stack Control: By moving down to the silicon level, OpenAI aims to create a self-reinforcing "flywheel" where model architecture informs chip design, and chip efficiency subsequently enables faster, more capable, and more affordable model training and deployment.
- Scalability: The platform is designed for rapid deployment starting in 2026, targeting gigawatt-scale infrastructure in partnership with Microsoft and others.
- Efficiency: The primary objective is to democratize access to intelligence by reducing the cost and increasing the reliability of inference, which the company identifies as the critical stage where AI creates tangible value for users, developers, and enterprises.
The project signifies a transition for OpenAI from a software-centric company to a full-stack infrastructure provider, treating the hardware as a fundamental component of the product experience.